1. Field of the Invention
The present invention relates to a semiconductor memory device, in particular to an electrically erasable nonvolatile semiconductor memory device having charge pump circuits for providing a high voltage necessary to write or erase information in the memory device.
2. Description of the Prior Art
An electrically erasable and programmable read only memory (EEPROM) in general requires a high voltage of 21 V to 25 V for writing and erasing in addition to a low voltage of 5 V. According to older designs, since an EEPROM requires a large current and a high voltage for writing and erasing, it is necessary to provide an external high voltage supply along with an external low voltage supply.
Recently, new EEPROM cells with thin dielectrics utilizing a tunneling electron for writing and erasing have been proposed. According to such new cells, the current required for writing and erasing can be reduced, and dc current paths during writing and erasing can be eliminated. As a result, it is possible to put a voltage multiplier on the chip to generate the high voltage required to effect tunneling and to gradually transfer the high voltage to the selected column and row lines by charge pump circuits, which are connected to respective column and row lines.
The charge pump circuits are driven by clock pulses from a clock generator. However, according to the above prior art, since the clock pulses from the clock generator are applied to all the charge pump circuits and charge a capacitor in each of the charge pump circuits, even though that charge pump circuit is connected to the unselected column or row line, the load of the clock generator becomes extremely heavy.